\hypertarget{mlx5__fpga_2cmd_8h_source}{}\doxysection{cmd.\+h}
\label{mlx5__fpga_2cmd_8h_source}\index{dev/mlx5/mlx5\_fpga/cmd.h@{dev/mlx5/mlx5\_fpga/cmd.h}}
\mbox{\hyperlink{mlx5__fpga_2cmd_8h}{Go to the documentation of this file.}}
\begin{DoxyCode}{0}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00001}00001 \textcolor{comment}{/*-\/}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00002}00002 \textcolor{comment}{ * Copyright (c) 2017, Mellanox Technologies, Ltd.  All rights reserved.}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00003}00003 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00004}00004 \textcolor{comment}{ * This software is available to you under a choice of one of two}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00005}00005 \textcolor{comment}{ * licenses.  You may choose to be licensed under the terms of the GNU}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00006}00006 \textcolor{comment}{ * General Public License (GPL) Version 2, available from the file}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00007}00007 \textcolor{comment}{ * COPYING in the main directory of this source tree, or the}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00008}00008 \textcolor{comment}{ * OpenIB.org BSD license below:}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00009}00009 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00010}00010 \textcolor{comment}{ *     Redistribution and use in source and binary forms, with or}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00011}00011 \textcolor{comment}{ *     without modification, are permitted provided that the following}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00012}00012 \textcolor{comment}{ *     conditions are met:}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00013}00013 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00014}00014 \textcolor{comment}{ *      -\/ Redistributions of source code must retain the above}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00015}00015 \textcolor{comment}{ *        copyright notice, this list of conditions and the following}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00016}00016 \textcolor{comment}{ *        disclaimer.}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00017}00017 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00018}00018 \textcolor{comment}{ *      -\/ Redistributions in binary form must reproduce the above}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00019}00019 \textcolor{comment}{ *        copyright notice, this list of conditions and the following}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00020}00020 \textcolor{comment}{ *        disclaimer in the documentation and/or other materials}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00021}00021 \textcolor{comment}{ *        provided with the distribution.}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00022}00022 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00023}00023 \textcolor{comment}{ * THE SOFTWARE IS PROVIDED "{}AS IS"{}, WITHOUT WARRANTY OF ANY KIND,}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00024}00024 \textcolor{comment}{ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00025}00025 \textcolor{comment}{ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00026}00026 \textcolor{comment}{ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00027}00027 \textcolor{comment}{ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00028}00028 \textcolor{comment}{ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00029}00029 \textcolor{comment}{ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00030}00030 \textcolor{comment}{ * SOFTWARE.}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00031}00031 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00032}00032 \textcolor{comment}{ * \$FreeBSD\$}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00033}00033 \textcolor{comment}{ */}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00034}00034 }
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00035}00035 \textcolor{preprocessor}{\#ifndef \_\_MLX5\_FPGA\_H\_\_}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00036}00036 \textcolor{preprocessor}{\#define \_\_MLX5\_FPGA\_H\_\_}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00037}00037 }
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00038}00038 \textcolor{preprocessor}{\#include <linux/in6.h>}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00039}00039 \textcolor{preprocessor}{\#include <\mbox{\hyperlink{driver_8h}{dev/mlx5/driver.h}}>}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00040}00040 \textcolor{preprocessor}{\#include <\mbox{\hyperlink{mlx5io_8h}{dev/mlx5/mlx5io.h}}>}}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00041}00041 }
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00042}\mbox{\hyperlink{mlx5__fpga_2cmd_8h_a0b6133228fc055b3a2957f68bea1b949}{00042}} \textcolor{keyword}{enum} \mbox{\hyperlink{mlx5__fpga_2cmd_8h_a0b6133228fc055b3a2957f68bea1b949}{mlx5\_fpga\_qpc\_field\_select}} \{}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00043}\mbox{\hyperlink{mlx5__fpga_2cmd_8h_a0b6133228fc055b3a2957f68bea1b949a7a85996283e4ea516890307ec5c8d6db}{00043}}         \mbox{\hyperlink{mlx5__fpga_2cmd_8h_a0b6133228fc055b3a2957f68bea1b949a7a85996283e4ea516890307ec5c8d6db}{MLX5\_FPGA\_QPC\_STATE}} = BIT(0),}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00044}00044 \};}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00045}00045 }
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00046}\mbox{\hyperlink{structmlx5__fpga__qp__counters}{00046}} \textcolor{keyword}{struct }\mbox{\hyperlink{structmlx5__fpga__qp__counters}{mlx5\_fpga\_qp\_counters}} \{}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00047}\mbox{\hyperlink{structmlx5__fpga__qp__counters_a5a199e671bbf278d83352e5c0dce517e}{00047}}         u64 \mbox{\hyperlink{structmlx5__fpga__qp__counters_a5a199e671bbf278d83352e5c0dce517e}{rx\_ack\_packets}};}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00048}\mbox{\hyperlink{structmlx5__fpga__qp__counters_a2635b2bc918342c81187c7e861698bf5}{00048}}         u64 \mbox{\hyperlink{structmlx5__fpga__qp__counters_a2635b2bc918342c81187c7e861698bf5}{rx\_send\_packets}};}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00049}\mbox{\hyperlink{structmlx5__fpga__qp__counters_ac184f98a85ccd62c072b8f785ad9a039}{00049}}         u64 \mbox{\hyperlink{structmlx5__fpga__qp__counters_ac184f98a85ccd62c072b8f785ad9a039}{tx\_ack\_packets}};}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00050}\mbox{\hyperlink{structmlx5__fpga__qp__counters_ab1a3d9106428524c83e0459e76921001}{00050}}         u64 \mbox{\hyperlink{structmlx5__fpga__qp__counters_ab1a3d9106428524c83e0459e76921001}{tx\_send\_packets}};}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00051}\mbox{\hyperlink{structmlx5__fpga__qp__counters_acf99f6499760bbfd505dff4c78e3548b}{00051}}         u64 \mbox{\hyperlink{structmlx5__fpga__qp__counters_acf99f6499760bbfd505dff4c78e3548b}{rx\_total\_drop}};}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00052}00052 \};}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00053}00053 }
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00054}\mbox{\hyperlink{structmlx5__fpga__shell__counters}{00054}} \textcolor{keyword}{struct }\mbox{\hyperlink{structmlx5__fpga__shell__counters}{mlx5\_fpga\_shell\_counters}} \{}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00055}\mbox{\hyperlink{structmlx5__fpga__shell__counters_ad123e4953d254ee00ffee87cde96802b}{00055}}         u64 \mbox{\hyperlink{structmlx5__fpga__shell__counters_ad123e4953d254ee00ffee87cde96802b}{ddr\_read\_requests}};}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00056}\mbox{\hyperlink{structmlx5__fpga__shell__counters_a06c9a9ed53b2e1eeffd57454df5de30c}{00056}}         u64 \mbox{\hyperlink{structmlx5__fpga__shell__counters_a06c9a9ed53b2e1eeffd57454df5de30c}{ddr\_write\_requests}};}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00057}\mbox{\hyperlink{structmlx5__fpga__shell__counters_ad3bc3ebfd7e10f48e003784d64977de5}{00057}}         u64 \mbox{\hyperlink{structmlx5__fpga__shell__counters_ad3bc3ebfd7e10f48e003784d64977de5}{ddr\_read\_bytes}};}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00058}\mbox{\hyperlink{structmlx5__fpga__shell__counters_aa3dd8d271e3e764cf9ba62735402d902}{00058}}         u64 \mbox{\hyperlink{structmlx5__fpga__shell__counters_aa3dd8d271e3e764cf9ba62735402d902}{ddr\_write\_bytes}};}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00059}00059 \};}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00060}00060 }
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00061}00061 \textcolor{keywordtype}{int} \mbox{\hyperlink{mlx5__fpga_2cmd_8h_abe27dc3314064a8a67ea6544ec11dece}{mlx5\_fpga\_caps}}(\textcolor{keyword}{struct} \mbox{\hyperlink{structmlx5__core__dev}{mlx5\_core\_dev}} *dev);}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00062}00062 \textcolor{keywordtype}{int} \mbox{\hyperlink{mlx5__fpga_2cmd_8h_a6a612eb1cafc5a073c0c552a66cf6c51}{mlx5\_fpga\_query}}(\textcolor{keyword}{struct} \mbox{\hyperlink{structmlx5__core__dev}{mlx5\_core\_dev}} *dev, \textcolor{keyword}{struct} \mbox{\hyperlink{structmlx5__fpga__query}{mlx5\_fpga\_query}} *query);}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00063}00063 \textcolor{keywordtype}{int} \mbox{\hyperlink{mlx5__fpga_2cmd_8h_a5b5d5204b5552f7e0d9d5dc4292181b6}{mlx5\_fpga\_query\_mtmp}}(\textcolor{keyword}{struct} \mbox{\hyperlink{structmlx5__core__dev}{mlx5\_core\_dev}} *dev,}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00064}00064                          \textcolor{keyword}{struct} \mbox{\hyperlink{structmlx5__fpga__temperature}{mlx5\_fpga\_temperature}} *temp);}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00065}00065 \textcolor{keywordtype}{int} \mbox{\hyperlink{mlx5__fpga_2cmd_8h_ac5914a8fb156377905c3fe00c280069c}{mlx5\_fpga\_ctrl\_op}}(\textcolor{keyword}{struct} \mbox{\hyperlink{structmlx5__core__dev}{mlx5\_core\_dev}} *dev, u8 op);}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00066}00066 \textcolor{keywordtype}{int} \mbox{\hyperlink{mlx5__fpga_2cmd_8h_ae2ff9b44fa3b641e3a255ced1c3c1bed}{mlx5\_fpga\_access\_reg}}(\textcolor{keyword}{struct} \mbox{\hyperlink{structmlx5__core__dev}{mlx5\_core\_dev}} *dev, u8 size, u64 addr,}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00067}00067                          \textcolor{keywordtype}{void} *buf, \textcolor{keywordtype}{bool} write);}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00068}00068 \textcolor{keywordtype}{int} \mbox{\hyperlink{mlx5__fpga_2cmd_8h_a4b62e2d576dc537a2089eae832981110}{mlx5\_fpga\_sbu\_caps}}(\textcolor{keyword}{struct} \mbox{\hyperlink{structmlx5__core__dev}{mlx5\_core\_dev}} *dev, \textcolor{keywordtype}{void} *caps, \textcolor{keywordtype}{int} size);}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00069}00069 \textcolor{keywordtype}{int} \mbox{\hyperlink{mlx5__fpga_2cmd_8h_a9b6af8b6874442e0bf7d501dbb976448}{mlx5\_fpga\_load}}(\textcolor{keyword}{struct} \mbox{\hyperlink{structmlx5__core__dev}{mlx5\_core\_dev}} *dev, \textcolor{keyword}{enum} \mbox{\hyperlink{mlx5io_8h_abd09d1f785591c0ccc8fe9e49fd49303}{mlx5\_fpga\_image}} image);}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00070}00070 \textcolor{keywordtype}{int} \mbox{\hyperlink{mlx5__fpga_2cmd_8h_a3b055802d9d35028a02ee2a5328cee3d}{mlx5\_fpga\_image\_select}}(\textcolor{keyword}{struct} \mbox{\hyperlink{structmlx5__core__dev}{mlx5\_core\_dev}} *dev,}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00071}00071                            \textcolor{keyword}{enum} \mbox{\hyperlink{mlx5io_8h_abd09d1f785591c0ccc8fe9e49fd49303}{mlx5\_fpga\_image}} image);}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00072}00072 \textcolor{keywordtype}{int} \mbox{\hyperlink{mlx5__fpga_2cmd_8h_a3391932be83b029924c8d0cb18058d6f}{mlx5\_fpga\_ctrl\_connect}}(\textcolor{keyword}{struct} \mbox{\hyperlink{structmlx5__core__dev}{mlx5\_core\_dev}} *dev,}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00073}00073                            \textcolor{keyword}{enum} \mbox{\hyperlink{mlx5io_8h_ac573a5194065f34c0973d752102e6dd4}{mlx5\_fpga\_connect}} *connect);}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00074}00074 \textcolor{keywordtype}{int} \mbox{\hyperlink{mlx5__fpga_2cmd_8h_a303ce41e7282b4f9ec50a8fc1563f070}{mlx5\_fpga\_shell\_counters}}(\textcolor{keyword}{struct} \mbox{\hyperlink{structmlx5__core__dev}{mlx5\_core\_dev}} *dev, \textcolor{keywordtype}{bool} clear,}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00075}00075                              \textcolor{keyword}{struct} \mbox{\hyperlink{structmlx5__fpga__shell__counters}{mlx5\_fpga\_shell\_counters}} *\mbox{\hyperlink{mlx5__en__tx_8c_af943c26117683b64b9cd6943e2c496e5}{data}});}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00076}00076 }
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00077}00077 \textcolor{keywordtype}{int} \mbox{\hyperlink{mlx5__fpga_2cmd_8h_aaa2d172446e7ef267e0d5cf6461465d6}{mlx5\_fpga\_create\_qp}}(\textcolor{keyword}{struct} \mbox{\hyperlink{structmlx5__core__dev}{mlx5\_core\_dev}} *dev, \textcolor{keywordtype}{void} *fpga\_qpc,}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00078}00078                         u32 *fpga\_qpn);}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00079}00079 \textcolor{keywordtype}{int} \mbox{\hyperlink{mlx5__fpga_2cmd_8h_a2a7138b86f2643d49bd1bc9be5857a1b}{mlx5\_fpga\_modify\_qp}}(\textcolor{keyword}{struct} \mbox{\hyperlink{structmlx5__core__dev}{mlx5\_core\_dev}} *dev, u32 fpga\_qpn,}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00080}00080                         \textcolor{keyword}{enum} \mbox{\hyperlink{mlx5__fpga_2cmd_8h_a0b6133228fc055b3a2957f68bea1b949}{mlx5\_fpga\_qpc\_field\_select}} fields, \textcolor{keywordtype}{void} *fpga\_qpc);}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00081}00081 \textcolor{keywordtype}{int} \mbox{\hyperlink{mlx5__fpga_2cmd_8h_a4da1fca380abaca20b92556da92227fa}{mlx5\_fpga\_query\_qp}}(\textcolor{keyword}{struct} \mbox{\hyperlink{structmlx5__core__dev}{mlx5\_core\_dev}} *dev, u32 fpga\_qpn, \textcolor{keywordtype}{void} *fpga\_qpc);}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00082}00082 \textcolor{keywordtype}{int} \mbox{\hyperlink{mlx5__fpga_2cmd_8h_ac562ef5c6060349e6e106701552c8a66}{mlx5\_fpga\_query\_qp\_counters}}(\textcolor{keyword}{struct} \mbox{\hyperlink{structmlx5__core__dev}{mlx5\_core\_dev}} *dev, u32 fpga\_qpn,}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00083}00083                                 \textcolor{keywordtype}{bool} clear, \textcolor{keyword}{struct} \mbox{\hyperlink{structmlx5__fpga__qp__counters}{mlx5\_fpga\_qp\_counters}} *\mbox{\hyperlink{mlx5__en__tx_8c_af943c26117683b64b9cd6943e2c496e5}{data}});}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00084}00084 \textcolor{keywordtype}{int} \mbox{\hyperlink{mlx5__fpga_2cmd_8h_ad4455b1959566ce7ad0f79c357d8dc39}{mlx5\_fpga\_destroy\_qp}}(\textcolor{keyword}{struct} \mbox{\hyperlink{structmlx5__core__dev}{mlx5\_core\_dev}} *dev, u32 fpga\_qpn);}
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00085}00085 }
\DoxyCodeLine{\Hypertarget{mlx5__fpga_2cmd_8h_source_l00086}00086 \textcolor{preprocessor}{\#endif }\textcolor{comment}{/* \_\_MLX5\_FPGA\_H\_\_ */}\textcolor{preprocessor}{}}

\end{DoxyCode}
