\hypertarget{mlx5fpga__cmd_8c_source}{}\doxysection{mlx5fpga\+\_\+cmd.\+c}
\label{mlx5fpga__cmd_8c_source}\index{dev/mlx5/mlx5\_fpga/mlx5fpga\_cmd.c@{dev/mlx5/mlx5\_fpga/mlx5fpga\_cmd.c}}
\mbox{\hyperlink{mlx5fpga__cmd_8c}{Go to the documentation of this file.}}
\begin{DoxyCode}{0}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00001}00001 \textcolor{comment}{/*-\/}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00002}00002 \textcolor{comment}{ * Copyright (c) 2017, Mellanox Technologies. All rights reserved.}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00003}00003 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00004}00004 \textcolor{comment}{ * This software is available to you under a choice of one of two}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00005}00005 \textcolor{comment}{ * licenses.  You may choose to be licensed under the terms of the GNU}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00006}00006 \textcolor{comment}{ * General Public License (GPL) Version 2, available from the file}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00007}00007 \textcolor{comment}{ * COPYING in the main directory of this source tree, or the}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00008}00008 \textcolor{comment}{ * OpenIB.org BSD license below:}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00009}00009 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00010}00010 \textcolor{comment}{ *     Redistribution and use in source and binary forms, with or}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00011}00011 \textcolor{comment}{ *     without modification, are permitted provided that the following}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00012}00012 \textcolor{comment}{ *     conditions are met:}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00013}00013 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00014}00014 \textcolor{comment}{ *      -\/ Redistributions of source code must retain the above}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00015}00015 \textcolor{comment}{ *        copyright notice, this list of conditions and the following}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00016}00016 \textcolor{comment}{ *        disclaimer.}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00017}00017 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00018}00018 \textcolor{comment}{ *      -\/ Redistributions in binary form must reproduce the above}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00019}00019 \textcolor{comment}{ *        copyright notice, this list of conditions and the following}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00020}00020 \textcolor{comment}{ *        disclaimer in the documentation and/or other materials}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00021}00021 \textcolor{comment}{ *        provided with the distribution.}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00022}00022 \textcolor{comment}{ *}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00023}00023 \textcolor{comment}{ * THE SOFTWARE IS PROVIDED "{}AS IS"{}, WITHOUT WARRANTY OF ANY KIND,}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00024}00024 \textcolor{comment}{ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF}}
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00026}00026 \textcolor{comment}{ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00027}00027 \textcolor{comment}{ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00028}00028 \textcolor{comment}{ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00029}00029 \textcolor{comment}{ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE}}
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00042}\mbox{\hyperlink{mlx5fpga__cmd_8c_a1ae97d4e2bc2370ea587988f6358a287}{00042}} \textcolor{preprocessor}{\#define MLX5\_FPGA\_ACCESS\_REG\_SZ (MLX5\_ST\_SZ\_DW(fpga\_access\_reg) + \(\backslash\)}}
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00045}\mbox{\hyperlink{mlx5__fpga_2cmd_8h_ae2ff9b44fa3b641e3a255ced1c3c1bed}{00045}} \textcolor{keywordtype}{int} \mbox{\hyperlink{mlx5fpga__cmd_8c_ae2ff9b44fa3b641e3a255ced1c3c1bed}{mlx5\_fpga\_access\_reg}}(\textcolor{keyword}{struct} \mbox{\hyperlink{structmlx5__core__dev}{mlx5\_core\_dev}} *dev, u8 size, u64 addr,}
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00049}00049         u32 out[\mbox{\hyperlink{mlx5fpga__cmd_8c_a1ae97d4e2bc2370ea587988f6358a287}{MLX5\_FPGA\_ACCESS\_REG\_SZ}}];}
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00058}00058 }
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00059}00059         \mbox{\hyperlink{device_8h_a78623a3e69c7911bd715d06c32daa626}{MLX5\_SET}}(fpga\_access\_reg, in, size, size);}
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00064}00064         err = \mbox{\hyperlink{driver_8h_a588ab969bb7070e2dc60df62da38c8fa}{mlx5\_core\_access\_reg}}(dev, in, \textcolor{keyword}{sizeof}(in), out, \textcolor{keyword}{sizeof}(out),}
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00074}00074 }
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00076}00076 \{}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00077}00077         u32 in[\mbox{\hyperlink{device_8h_a2bdfa104f3d7c0635b984382d1562741}{MLX5\_ST\_SZ\_DW}}(fpga\_cap)] = \{0\};}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00078}00078 }
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00079}00079         \textcolor{keywordflow}{return} \mbox{\hyperlink{driver_8h_a588ab969bb7070e2dc60df62da38c8fa}{mlx5\_core\_access\_reg}}(dev, in, \textcolor{keyword}{sizeof}(in), dev-\/>\mbox{\hyperlink{structmlx5__core__dev_a7ce7a5d3a6d209167e4948732818ce6d}{caps}}.\mbox{\hyperlink{structmlx5__core__dev_ab44d1e761775f29e4328c4996adcb190}{fpga}},}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00080}00080                                     \mbox{\hyperlink{device_8h_a459f4e51a5d10dfb6fed7cafff215cb4}{MLX5\_ST\_SZ\_BYTES}}(fpga\_cap),}
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00084}\mbox{\hyperlink{mlx5__fpga_2cmd_8h_ac5914a8fb156377905c3fe00c280069c}{00084}} \textcolor{keywordtype}{int} \mbox{\hyperlink{mlx5fpga__cmd_8c_ac5914a8fb156377905c3fe00c280069c}{mlx5\_fpga\_ctrl\_op}}(\textcolor{keyword}{struct} \mbox{\hyperlink{structmlx5__core__dev}{mlx5\_core\_dev}} *dev, u8 op)}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00085}00085 \{}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00086}00086         u32 in[\mbox{\hyperlink{device_8h_a2bdfa104f3d7c0635b984382d1562741}{MLX5\_ST\_SZ\_DW}}(fpga\_ctrl)] = \{0\};}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00087}00087         u32 out[\mbox{\hyperlink{device_8h_a2bdfa104f3d7c0635b984382d1562741}{MLX5\_ST\_SZ\_DW}}(fpga\_ctrl)];}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00088}00088 }
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00089}00089         \mbox{\hyperlink{device_8h_a78623a3e69c7911bd715d06c32daa626}{MLX5\_SET}}(fpga\_ctrl, in, operation, op);}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00090}00090 }
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00091}00091         \textcolor{keywordflow}{return} \mbox{\hyperlink{driver_8h_a588ab969bb7070e2dc60df62da38c8fa}{mlx5\_core\_access\_reg}}(dev, in, \textcolor{keyword}{sizeof}(in), out, \textcolor{keyword}{sizeof}(out),}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00092}00092                                     \mbox{\hyperlink{driver_8h_a3babbf89cae9b856a12864a41506efbdaa8a80a8826b9f1fb5339070e63ab0b77}{MLX5\_REG\_FPGA\_CTRL}}, 0, \textcolor{keyword}{true});}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00093}00093 \}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00094}00094 }
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00095}\mbox{\hyperlink{mlx5__fpga_2cmd_8h_a4b62e2d576dc537a2089eae832981110}{00095}} \textcolor{keywordtype}{int} \mbox{\hyperlink{mlx5fpga__cmd_8c_a4b62e2d576dc537a2089eae832981110}{mlx5\_fpga\_sbu\_caps}}(\textcolor{keyword}{struct} \mbox{\hyperlink{structmlx5__core__dev}{mlx5\_core\_dev}} *dev, \textcolor{keywordtype}{void} *caps, \textcolor{keywordtype}{int} size)}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00096}00096 \{}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00097}00097         \textcolor{keywordtype}{unsigned} \textcolor{keywordtype}{int} cap\_size = \mbox{\hyperlink{device_8h_ac7dc30f0629f44ba36e9d709cbeebd35}{MLX5\_CAP\_FPGA}}(dev, sandbox\_extended\_caps\_len);}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00098}00098         u64 addr = \mbox{\hyperlink{device_8h_afc67fea24ffd929be3488e0af699b59f}{MLX5\_CAP64\_FPGA}}(dev, sandbox\_extended\_caps\_addr);}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00099}00099         \textcolor{keywordtype}{unsigned} \textcolor{keywordtype}{int} read;}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00100}00100         \textcolor{keywordtype}{int} ret = 0;}
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00102}00102         \textcolor{keywordflow}{if} (cap\_size > size) \{}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00103}00103                 \mbox{\hyperlink{mlx5__core_8h_ac024f7b881a7d4965ecc662bc4be81ca}{mlx5\_core\_warn}}(dev, \textcolor{stringliteral}{"{}Not enough buffer \%u for FPGA SBU caps \%u"{}},}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00104}00104                                size, cap\_size);}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00105}00105                 \textcolor{keywordflow}{return} -\/EINVAL;}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00106}00106         \}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00107}00107 }
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00108}00108         \textcolor{keywordflow}{while} (cap\_size > 0) \{}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00109}00109                 read = min\_t(\textcolor{keywordtype}{unsigned} \textcolor{keywordtype}{int}, cap\_size,}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00110}00110                              \mbox{\hyperlink{mlx5__ifc__fpga_8h_a34cb2a3f683c647504e211ac762c4015}{MLX5\_FPGA\_ACCESS\_REG\_SIZE\_MAX}});}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00111}00111 }
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00112}00112                 ret = \mbox{\hyperlink{mlx5fpga__cmd_8c_ae2ff9b44fa3b641e3a255ced1c3c1bed}{mlx5\_fpga\_access\_reg}}(dev, read, addr, caps, \textcolor{keyword}{false});}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00113}00113                 \textcolor{keywordflow}{if} (ret) \{}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00114}00114                         \mbox{\hyperlink{mlx5__core_8h_ac024f7b881a7d4965ecc662bc4be81ca}{mlx5\_core\_warn}}(dev, \textcolor{stringliteral}{"{}Error reading FPGA SBU caps \%u bytes at address \%\#jx: \%d"{}},}
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00117}00117                 \}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00118}00118 }
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00119}00119                 cap\_size -\/= read;}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00120}00120                 addr += read;}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00121}00121                 caps += read;}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00122}00122         \}}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00123}00123 }
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00124}00124         \textcolor{keywordflow}{return} ret;}
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00126}00126 }
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00127}\mbox{\hyperlink{mlx5fpga__cmd_8c_ae33458d106a7694758cd78b7f4fe4bf3}{00127}} \textcolor{keyword}{static} \textcolor{keywordtype}{int} \mbox{\hyperlink{mlx5fpga__cmd_8c_ae33458d106a7694758cd78b7f4fe4bf3}{mlx5\_fpga\_ctrl\_write}}(\textcolor{keyword}{struct} \mbox{\hyperlink{structmlx5__core__dev}{mlx5\_core\_dev}} *dev, u8 op,}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00128}00128                                 \textcolor{keyword}{enum} \mbox{\hyperlink{mlx5io_8h_abd09d1f785591c0ccc8fe9e49fd49303}{mlx5\_fpga\_image}} image)}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00129}00129 \{}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00130}00130         u32 in[\mbox{\hyperlink{device_8h_a2bdfa104f3d7c0635b984382d1562741}{MLX5\_ST\_SZ\_DW}}(fpga\_ctrl)] = \{0\};}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00131}00131         u32 out[\mbox{\hyperlink{device_8h_a2bdfa104f3d7c0635b984382d1562741}{MLX5\_ST\_SZ\_DW}}(fpga\_ctrl)];}
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00133}00133         \mbox{\hyperlink{device_8h_a78623a3e69c7911bd715d06c32daa626}{MLX5\_SET}}(fpga\_ctrl, in, operation, op);}
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00167}00167 }
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00178}00178                                            \textcolor{keyword}{sizeof}(out), \mbox{\hyperlink{driver_8h_a3babbf89cae9b856a12864a41506efbdaa8a80a8826b9f1fb5339070e63ab0b77}{MLX5\_REG\_FPGA\_CTRL}},}
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00189}00189                                            \textcolor{keyword}{sizeof}(out), \mbox{\hyperlink{driver_8h_a3babbf89cae9b856a12864a41506efbdaa8a80a8826b9f1fb5339070e63ab0b77}{MLX5\_REG\_FPGA\_CTRL}},}
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00205}00205                  (temp-\/>\mbox{\hyperlink{structmlx5__fpga__temperature_aac19a31d1e5d1065274cd45943cad7e0}{index}} > \mbox{\hyperlink{mlx5io_8h_a48a75936a769361254a210208178def3}{MLX5\_FPGA\_INTERNAL\_SENSORS\_HIGH}})) ? 1 : 0);}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00206}00206 }
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00207}00207         err = \mbox{\hyperlink{driver_8h_a588ab969bb7070e2dc60df62da38c8fa}{mlx5\_core\_access\_reg}}(dev, in, \textcolor{keyword}{sizeof}(in), out, \textcolor{keyword}{sizeof}(out),}
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00211}00211 }
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00213}00213         temp-\/>\mbox{\hyperlink{structmlx5__fpga__temperature_ae269b96397899a1eb7331314462d3005}{temperature}} = \mbox{\hyperlink{device_8h_a12a03f8a456490fce8c791c7f2922f97}{MLX5\_GET}}(mtmp\_reg, out, temperature);}
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00215}00215         temp-\/>\mbox{\hyperlink{structmlx5__fpga__temperature_a409e86c0cd70567687ade3307fde96cd}{max\_temperature}} = \mbox{\hyperlink{device_8h_a12a03f8a456490fce8c791c7f2922f97}{MLX5\_GET}}(mtmp\_reg, out, max\_temperature);}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00216}00216         temp-\/>\mbox{\hyperlink{structmlx5__fpga__temperature_abbb2099ed8c29d92a4fc879af7693a29}{tee}} = \mbox{\hyperlink{device_8h_a12a03f8a456490fce8c791c7f2922f97}{MLX5\_GET}}(mtmp\_reg, out, tee);}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00217}00217         temp-\/>\mbox{\hyperlink{structmlx5__fpga__temperature_a29fa49af7b863fe9036f0d8924a5988f}{temperature\_threshold\_hi}} = \mbox{\hyperlink{device_8h_a12a03f8a456490fce8c791c7f2922f97}{MLX5\_GET}}(mtmp\_reg, out,}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00218}00218                 temperature\_threshold\_hi);}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00219}00219         temp-\/>\mbox{\hyperlink{structmlx5__fpga__temperature_a415b78cd11a26a2d8a4fb7e19d157fd3}{temperature\_threshold\_lo}} = \mbox{\hyperlink{device_8h_a12a03f8a456490fce8c791c7f2922f97}{MLX5\_GET}}(mtmp\_reg, out,}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00220}00220                 temperature\_threshold\_lo);}
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00221}00221         memcpy(temp-\/>\mbox{\hyperlink{structmlx5__fpga__temperature_acfab3d20faec205a65234067a91ba288}{sensor\_name}}, \mbox{\hyperlink{device_8h_ad5cad9c2e464873013bfb7b9761d25a1}{MLX5\_ADDR\_OF}}(mtmp\_reg, out, sensor\_name),}
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00226}00226 }
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00233}00233 }
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00237}00237 }
\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00238}00238         ret = \mbox{\hyperlink{driver_8h_ad7393e74938540251a0c894eb1eae135}{mlx5\_cmd\_exec}}(dev, in, \textcolor{keyword}{sizeof}(in), out, \textcolor{keyword}{sizeof}(out));}
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\DoxyCodeLine{\Hypertarget{mlx5fpga__cmd_8c_source_l00342}00342                                                   ddr\_read\_bytes);}
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