\doxysection{Data Structures}
Here are the data structures with brief descriptions\+:\begin{DoxyCompactList}
\item\contentsline{section}{\mbox{\hyperlink{struct__ALTERABLE__ARRAY__INFO}{\+\_\+\+ALTERABLE\+\_\+\+ARRAY\+\_\+\+INFO}} }{\pageref{struct__ALTERABLE__ARRAY__INFO}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__ALTERABLE__DEVICE__INFO}{\+\_\+\+ALTERABLE\+\_\+\+DEVICE\+\_\+\+INFO}} }{\pageref{struct__ALTERABLE__DEVICE__INFO}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__ALTERABLE__DEVICE__INFO__V2}{\+\_\+\+ALTERABLE\+\_\+\+DEVICE\+\_\+\+INFO\+\_\+\+V2}} }{\pageref{struct__ALTERABLE__DEVICE__INFO__V2}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__ArrayDescript}{\+\_\+\+Array\+Descript}} }{\pageref{struct__ArrayDescript}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__AtaCommand}{\+\_\+\+Ata\+Command}} }{\pageref{struct__AtaCommand}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__BUS__DMAMAP}{\+\_\+\+BUS\+\_\+\+DMAMAP}} }{\pageref{struct__BUS__DMAMAP}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__CHANNEL__INFO}{\+\_\+\+CHANNEL\+\_\+\+INFO}} }{\pageref{struct__CHANNEL__INFO}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__Command}{\+\_\+\+Command}} }{\pageref{struct__Command}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__CONFIGURATION__IDENTIFY__DATA}{\+\_\+\+CONFIGURATION\+\_\+\+IDENTIFY\+\_\+\+DATA}} }{\pageref{struct__CONFIGURATION__IDENTIFY__DATA}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__CONTROLLER__INFO}{\+\_\+\+CONTROLLER\+\_\+\+INFO}} }{\pageref{struct__CONTROLLER__INFO}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__CREATE__ARRAY__PARAMS}{\+\_\+\+CREATE\+\_\+\+ARRAY\+\_\+\+PARAMS}} }{\pageref{struct__CREATE__ARRAY__PARAMS}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__Device}{\+\_\+\+Device}} }{\pageref{struct__Device}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__DEVICE__INFO}{\+\_\+\+DEVICE\+\_\+\+INFO}} }{\pageref{struct__DEVICE__INFO}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__DEVICE__IO__EX__PARAMS}{\+\_\+\+DEVICE\+\_\+\+IO\+\_\+\+EX\+\_\+\+PARAMS}} }{\pageref{struct__DEVICE__IO__EX__PARAMS}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__dpc__routine}{\+\_\+dpc\+\_\+routine}} }{\pageref{struct__dpc__routine}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__DRIVER__CAPABILITIES}{\+\_\+\+DRIVER\+\_\+\+CAPABILITIES}} }{\pageref{struct__DRIVER__CAPABILITIES}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__HPT601__INFO}{\+\_\+\+HPT601\+\_\+\+INFO}} }{\pageref{struct__HPT601__INFO}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__HPT__ADD__DISK__TO__ARRAY}{\+\_\+\+HPT\+\_\+\+ADD\+\_\+\+DISK\+\_\+\+TO\+\_\+\+ARRAY}} }{\pageref{struct__HPT__ADD__DISK__TO__ARRAY}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__HPT__ARRAY__INFO}{\+\_\+\+HPT\+\_\+\+ARRAY\+\_\+\+INFO}} }{\pageref{struct__HPT__ARRAY__INFO}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__HPT__DEVICE__IO}{\+\_\+\+HPT\+\_\+\+DEVICE\+\_\+\+IO}} }{\pageref{struct__HPT__DEVICE__IO}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__HPT__EVENT}{\+\_\+\+HPT\+\_\+\+EVENT}} }{\pageref{struct__HPT__EVENT}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__HPT__IOCTL__PARAM}{\+\_\+\+HPT\+\_\+\+IOCTL\+\_\+\+PARAM}} }{\pageref{struct__HPT__IOCTL__PARAM}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__HPT__IOCTL__PARAM32}{\+\_\+\+HPT\+\_\+\+IOCTL\+\_\+\+PARAM32}} }{\pageref{struct__HPT__IOCTL__PARAM32}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__HPT__IOCTL__TRANSFER__PARAM}{\+\_\+\+HPT\+\_\+\+IOCTL\+\_\+\+TRANSFER\+\_\+\+PARAM}} }{\pageref{struct__HPT__IOCTL__TRANSFER__PARAM}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__HPT__REBUILD__PARAM}{\+\_\+\+HPT\+\_\+\+REBUILD\+\_\+\+PARAM}} }{\pageref{struct__HPT__REBUILD__PARAM}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__HPT__SET__ARRAY__INFO}{\+\_\+\+HPT\+\_\+\+SET\+\_\+\+ARRAY\+\_\+\+INFO}} }{\pageref{struct__HPT__SET__ARRAY__INFO}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__HPT__SET__DEVICE__INFO}{\+\_\+\+HPT\+\_\+\+SET\+\_\+\+DEVICE\+\_\+\+INFO}} }{\pageref{struct__HPT__SET__DEVICE__INFO}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__HPT__SET__DEVICE__INFO__V2}{\+\_\+\+HPT\+\_\+\+SET\+\_\+\+DEVICE\+\_\+\+INFO\+\_\+\+V2}} }{\pageref{struct__HPT__SET__DEVICE__INFO__V2}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__HPT__SET__STATE__PARAM}{\+\_\+\+HPT\+\_\+\+SET\+\_\+\+STATE\+\_\+\+PARAM}} }{\pageref{struct__HPT__SET__STATE__PARAM}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__IDE__PASS__THROUGH__HEADER}{\+\_\+\+IDE\+\_\+\+PASS\+\_\+\+THROUGH\+\_\+\+HEADER}} }{\pageref{struct__IDE__PASS__THROUGH__HEADER}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__IDE__REGISTERS__1}{\+\_\+\+IDE\+\_\+\+REGISTERS\+\_\+1}} }{\pageref{struct__IDE__REGISTERS__1}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__IDE__REGISTERS__2}{\+\_\+\+IDE\+\_\+\+REGISTERS\+\_\+2}} }{\pageref{struct__IDE__REGISTERS__2}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__IDENTIFY__DATA}{\+\_\+\+IDENTIFY\+\_\+\+DATA}} }{\pageref{struct__IDENTIFY__DATA}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__IDENTIFY__DATA2}{\+\_\+\+IDENTIFY\+\_\+\+DATA2}} }{\pageref{struct__IDENTIFY__DATA2}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__INQUIRYDATA}{\+\_\+\+INQUIRYDATA}} }{\pageref{struct__INQUIRYDATA}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__LOGICAL__DEVICE__INFO}{\+\_\+\+LOGICAL\+\_\+\+DEVICE\+\_\+\+INFO}} }{\pageref{struct__LOGICAL__DEVICE__INFO}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__Master__Boot__Record}{\+\_\+\+Master\+\_\+\+Boot\+\_\+\+Record}} }{\pageref{struct__Master__Boot__Record}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__MV__CHANNEL}{\+\_\+\+MV\+\_\+\+CHANNEL}} }{\pageref{struct__MV__CHANNEL}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__PassthroughCmd}{\+\_\+\+Passthrough\+Cmd}} }{\pageref{struct__PassthroughCmd}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__R1ControlCmd}{\+\_\+\+R1\+Control\+Cmd}} }{\pageref{struct__R1ControlCmd}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__R5ControlCmd}{\+\_\+\+R5\+Control\+Cmd}} }{\pageref{struct__R5ControlCmd}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__RaidArray}{\+\_\+\+Raid\+Array}} }{\pageref{struct__RaidArray}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__SCAT__GATH}{\+\_\+\+SCAT\+\_\+\+GATH}} }{\pageref{struct__SCAT__GATH}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__TIME__RECORD}{\+\_\+\+TIME\+\_\+\+RECORD}} }{\pageref{struct__TIME__RECORD}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__VBus}{\+\_\+\+VBus}} }{\pageref{struct__VBus}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__VDevice}{\+\_\+\+VDevice}} }{\pageref{struct__VDevice}}{}
\item\contentsline{section}{\mbox{\hyperlink{struct__VDevice__Ext}{\+\_\+\+VDevice\+\_\+\+Ext}} }{\pageref{struct__VDevice__Ext}}{}
\item\contentsline{section}{\mbox{\hyperlink{structfdisk__partition__table}{fdisk\+\_\+partition\+\_\+table}} }{\pageref{structfdisk__partition__table}}{}
\item\contentsline{section}{\mbox{\hyperlink{structIALAdapter}{IALAdapter}} }{\pageref{structIALAdapter}}{}
\item\contentsline{section}{\mbox{\hyperlink{structmvNoneUdmaCommandParams}{mv\+None\+Udma\+Command\+Params}} }{\pageref{structmvNoneUdmaCommandParams}}{}
\item\contentsline{section}{\mbox{\hyperlink{structmvOsSemaphore}{mv\+Os\+Semaphore}} }{\pageref{structmvOsSemaphore}}{}
\item\contentsline{section}{\mbox{\hyperlink{structmvQueueCommandInfo}{mv\+Queue\+Command\+Info}} }{\pageref{structmvQueueCommandInfo}}{}
\item\contentsline{section}{\mbox{\hyperlink{structmvQueuedCommandEntry}{mv\+Queued\+Command\+Entry}} }{\pageref{structmvQueuedCommandEntry}}{}
\item\contentsline{section}{\mbox{\hyperlink{structmvSataAdapter}{mv\+Sata\+Adapter}} }{\pageref{structmvSataAdapter}}{}
\item\contentsline{section}{\mbox{\hyperlink{structmvSataAdapterStatus}{mv\+Sata\+Adapter\+Status}} }{\pageref{structmvSataAdapterStatus}}{}
\item\contentsline{section}{\mbox{\hyperlink{structmvSataChannel}{mv\+Sata\+Channel}} }{\pageref{structmvSataChannel}}{}
\item\contentsline{section}{\mbox{\hyperlink{structmvSataChannelStatus}{mv\+Sata\+Channel\+Status}} }{\pageref{structmvSataChannelStatus}}{}
\item\contentsline{section}{\mbox{\hyperlink{structmvSataEdmaPRDEntry}{mv\+Sata\+Edma\+PRDEntry}} }{\pageref{structmvSataEdmaPRDEntry}}{}
\item\contentsline{section}{\mbox{\hyperlink{structmvStorageDevRegisters}{mv\+Storage\+Dev\+Registers}} }{\pageref{structmvStorageDevRegisters}}{}
\item\contentsline{section}{\mbox{\hyperlink{structmvUdmaCommandParams}{mv\+Udma\+Command\+Params}} }{\pageref{structmvUdmaCommandParams}}{}
\item\contentsline{section}{\mbox{\hyperlink{structpartition}{partition}} }{\pageref{structpartition}}{}
\item\contentsline{section}{\mbox{\hyperlink{structst__HPT__DPC}{st\+\_\+\+HPT\+\_\+\+DPC}} }{\pageref{structst__HPT__DPC}}{}
\end{DoxyCompactList}
