\hypertarget{dwgpio_8c}{}\doxysection{dev/gpio/dwgpio/dwgpio.c File Reference}
\label{dwgpio_8c}\index{dev/gpio/dwgpio/dwgpio.c@{dev/gpio/dwgpio/dwgpio.c}}
{\ttfamily \#include $<$sys/cdefs.\+h$>$}\newline
{\ttfamily \#include $<$sys/param.\+h$>$}\newline
{\ttfamily \#include $<$sys/systm.\+h$>$}\newline
{\ttfamily \#include $<$sys/bus.\+h$>$}\newline
{\ttfamily \#include $<$sys/kernel.\+h$>$}\newline
{\ttfamily \#include $<$sys/module.\+h$>$}\newline
{\ttfamily \#include $<$sys/malloc.\+h$>$}\newline
{\ttfamily \#include $<$sys/rman.\+h$>$}\newline
{\ttfamily \#include $<$sys/timeet.\+h$>$}\newline
{\ttfamily \#include $<$sys/timetc.\+h$>$}\newline
{\ttfamily \#include $<$sys/watchdog.\+h$>$}\newline
{\ttfamily \#include $<$sys/mutex.\+h$>$}\newline
{\ttfamily \#include $<$sys/gpio.\+h$>$}\newline
{\ttfamily \#include $<$sys/reboot.\+h$>$}\newline
{\ttfamily \#include $<$dev/gpio/gpiobusvar.\+h$>$}\newline
{\ttfamily \#include $<$dev/ofw/openfirm.\+h$>$}\newline
{\ttfamily \#include $<$dev/ofw/ofw\+\_\+bus.\+h$>$}\newline
{\ttfamily \#include $<$dev/ofw/ofw\+\_\+bus\+\_\+subr.\+h$>$}\newline
{\ttfamily \#include $<$machine/bus.\+h$>$}\newline
{\ttfamily \#include $<$machine/cpu.\+h$>$}\newline
{\ttfamily \#include $<$machine/intr.\+h$>$}\newline
{\ttfamily \#include \char`\"{}gpio\+\_\+if.\+h\char`\"{}}\newline
{\ttfamily \#include \char`\"{}dwgpio\+\_\+if.\+h\char`\"{}}\newline
Include dependency graph for dwgpio.\+c\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{dc/d09/dwgpio_8c__incl}
\end{center}
\end{figure}
\doxysubsection*{Data Structures}
\begin{DoxyCompactItemize}
\item 
struct \mbox{\hyperlink{structdwgpio__softc}{dwgpio\+\_\+softc}}
\end{DoxyCompactItemize}
\doxysubsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\#define \mbox{\hyperlink{dwgpio_8c_a26db9894cb8f31733db71eb61eb0ac1f}{READ4}}(\+\_\+sc,  \+\_\+reg)~DWGPIO\+\_\+\+READ((\+\_\+sc)-\/$>$parent, \+\_\+reg)
\item 
\#define \mbox{\hyperlink{dwgpio_8c_a448f7c60f1de233253b7e2234089a8a8}{WRITE4}}(\+\_\+sc,  \+\_\+reg,  \+\_\+val)~DWGPIO\+\_\+\+WRITE((\+\_\+sc)-\/$>$parent, \+\_\+reg, \+\_\+val)
\item 
\#define \mbox{\hyperlink{dwgpio_8c_a72906ccc0bbe2c66aac7da03737182a6}{GPIO\+\_\+\+SWPORT\+\_\+\+DR}}(n)~(0x00 + 0xc $\ast$ (n)) /$\ast$ Port n Data Register $\ast$/
\item 
\#define \mbox{\hyperlink{dwgpio_8c_a17d60092010e37f13b5bfce175fea3a1}{GPIO\+\_\+\+SWPORT\+\_\+\+DDR}}(n)~(0x04 + 0xc $\ast$ (n)) /$\ast$ Port n Data Direction $\ast$/
\item 
\#define \mbox{\hyperlink{dwgpio_8c_a2bcaa378e74035ca12109b088aa8dca6}{GPIO\+\_\+\+INTEN}}~0x30 /$\ast$ Interrupt Enable Register $\ast$/
\item 
\#define \mbox{\hyperlink{dwgpio_8c_ae6a7f92b0c59cc936bb524acb9536c01}{GPIO\+\_\+\+INTMASK}}~0x34 /$\ast$ Interrupt Mask Register $\ast$/
\item 
\#define \mbox{\hyperlink{dwgpio_8c_ac13143e740d941bd064ec144e8f74529}{GPIO\+\_\+\+INTTYPE\+\_\+\+LEVEL}}~0x38 /$\ast$ Interrupt Level Register $\ast$/
\item 
\#define \mbox{\hyperlink{dwgpio_8c_a45678896e6ddde7e1de7b40d66771856}{GPIO\+\_\+\+INT\+\_\+\+POLARITY}}~0x3C /$\ast$ Interrupt Polarity Register $\ast$/
\item 
\#define \mbox{\hyperlink{dwgpio_8c_a0394f7c3cd20ec1e78aa491d88c879be}{GPIO\+\_\+\+INTSTATUS}}~0x40 /$\ast$ Interrupt Status Register $\ast$/
\item 
\#define \mbox{\hyperlink{dwgpio_8c_a5ca7df6d6760225ce771a74ab6866df6}{GPIO\+\_\+\+RAW\+\_\+\+INTSTATUS}}~0x44 /$\ast$ Raw Interrupt Status Register $\ast$/
\item 
\#define \mbox{\hyperlink{dwgpio_8c_a2da85a8ef9c12d85e6f64fdf306b13d9}{GPIO\+\_\+\+DEBOUNCE}}~0x48 /$\ast$ Debounce Enable Register $\ast$/
\item 
\#define \mbox{\hyperlink{dwgpio_8c_a3169293f3eecab055ed5a1647927f866}{GPIO\+\_\+\+PORTA\+\_\+\+EOI}}~0x4C /$\ast$ Clear Interrupt Register $\ast$/
\item 
\#define \mbox{\hyperlink{dwgpio_8c_a62aaf301547ed9ae2f25c56fe9a0cecb}{GPIO\+\_\+\+EXT\+\_\+\+PORT}}(n)~(0x50 + 0x4 $\ast$ (n)) /$\ast$ External Port n $\ast$/
\item 
\#define \mbox{\hyperlink{dwgpio_8c_a4fafa6f45bda658b9a38ebdd5ded2c3d}{GPIO\+\_\+\+LS\+\_\+\+SYNC}}~0x60 /$\ast$ Synchronization Level Register $\ast$/
\item 
\#define \mbox{\hyperlink{dwgpio_8c_a986b030dcffbcd3e6ffd014d638406ed}{GPIO\+\_\+\+ID\+\_\+\+CODE}}~0x64 /$\ast$ ID Code Register $\ast$/
\item 
\#define \mbox{\hyperlink{dwgpio_8c_a2da89311b866a6530932804e1fb2728a}{GPIO\+\_\+\+VER\+\_\+\+ID\+\_\+\+CODE}}~0x6C /$\ast$ GPIO Version Register $\ast$/
\item 
\#define \mbox{\hyperlink{dwgpio_8c_a3b97234f852c6cfc401584a1962e970e}{GPIO\+\_\+\+CONFIG\+\_\+\+REG2}}~0x70 /$\ast$ Configuration Register 2 $\ast$/
\item 
\#define \mbox{\hyperlink{dwgpio_8c_a1e0d3172a40157da136d87a5988b7556}{ENCODED\+\_\+\+ID\+\_\+\+PWIDTH\+\_\+M}}~0x1f /$\ast$ Width of GPIO Port N Mask $\ast$/
\item 
\#define \mbox{\hyperlink{dwgpio_8c_a4da396abc99eb7504228bd889cf3c684}{ENCODED\+\_\+\+ID\+\_\+\+PWIDTH\+\_\+S}}(n)~(5 $\ast$ n) /$\ast$ Width of GPIO Port N Shift $\ast$/
\item 
\#define \mbox{\hyperlink{dwgpio_8c_af03d8e2b3692acecf61701ee3f190b9f}{GPIO\+\_\+\+CONFIG\+\_\+\+REG1}}~0x74 /$\ast$ Configuration Register 1 $\ast$/
\item 
\#define \mbox{\hyperlink{dwgpio_8c_a1c899fae586d7b524e64f6a96d584850}{NR\+\_\+\+GPIO\+\_\+\+MAX}}~32 /$\ast$ Maximum pins per port $\ast$/
\item 
\#define \mbox{\hyperlink{dwgpio_8c_aef85ce9faaef7c35e72991cba2627012}{GPIO\+\_\+\+LOCK}}(\+\_\+sc)~mtx\+\_\+lock(\&(\+\_\+sc)-\/$>$sc\+\_\+mtx)
\item 
\#define \mbox{\hyperlink{dwgpio_8c_a4115c303b4fa85d9131989ac3838599f}{GPIO\+\_\+\+UNLOCK}}(\+\_\+sc)~mtx\+\_\+unlock(\&(\+\_\+sc)-\/$>$sc\+\_\+mtx)
\item 
\#define \mbox{\hyperlink{dwgpio_8c_a71c9bed95a7512fe874d8edec1c6690f}{DEFAULT\+\_\+\+CAPS}}~(GPIO\+\_\+\+PIN\+\_\+\+INPUT $\vert$ GPIO\+\_\+\+PIN\+\_\+\+OUTPUT)
\end{DoxyCompactItemize}
\doxysubsection*{Functions}
\begin{DoxyCompactItemize}
\item 
\mbox{\hyperlink{dwgpio_8c_a8c3ef283470a68cd30afe9b8a72cb60f}{\+\_\+\+\_\+\+FBSDID}} (\char`\"{}\$Free\+BSD\$\char`\"{})
\item 
static device\+\_\+t \mbox{\hyperlink{dwgpio_8c_ae151fc601f6367a4e378b2146411587c}{dwgpio\+\_\+get\+\_\+bus}} (device\+\_\+t)
\item 
static int \mbox{\hyperlink{dwgpio_8c_a543dd66d4e450c4d2535f5331c550127}{dwgpio\+\_\+pin\+\_\+max}} (device\+\_\+t, int $\ast$)
\item 
static int \mbox{\hyperlink{dwgpio_8c_ad3e96c278450508e0a41fb6733786bbc}{dwgpio\+\_\+pin\+\_\+getcaps}} (device\+\_\+t, uint32\+\_\+t, uint32\+\_\+t $\ast$)
\item 
static int \mbox{\hyperlink{dwgpio_8c_af10e7b8c87a90748eb7a628bbff4eab1}{dwgpio\+\_\+pin\+\_\+getname}} (device\+\_\+t, uint32\+\_\+t, char $\ast$)
\item 
static int \mbox{\hyperlink{dwgpio_8c_a8a1c67665dfaaee09d7d00e722bcea42}{dwgpio\+\_\+pin\+\_\+getflags}} (device\+\_\+t, uint32\+\_\+t, uint32\+\_\+t $\ast$)
\item 
static int \mbox{\hyperlink{dwgpio_8c_aa7ac9425881d243acd80df96973f4bcf}{dwgpio\+\_\+pin\+\_\+setflags}} (device\+\_\+t, uint32\+\_\+t, uint32\+\_\+t)
\item 
static int \mbox{\hyperlink{dwgpio_8c_ac726c6b4f79e3732249a117358ff38c3}{dwgpio\+\_\+pin\+\_\+set}} (device\+\_\+t, uint32\+\_\+t, unsigned int)
\item 
static int \mbox{\hyperlink{dwgpio_8c_a95c66acdd1bf564ec93d97962b449c1d}{dwgpio\+\_\+pin\+\_\+get}} (device\+\_\+t, uint32\+\_\+t, unsigned int $\ast$)
\item 
static int \mbox{\hyperlink{dwgpio_8c_a5ad3f444129346a342a70e023c79ffca}{dwgpio\+\_\+pin\+\_\+toggle}} (device\+\_\+t, uint32\+\_\+t \mbox{\hyperlink{gpio__if_8m_ad42c8c8e9330d63f923bc677a1810042}{pin}})
\item 
static int \mbox{\hyperlink{dwgpio_8c_a420903e96c1b59e2a9b255345764573a}{dwgpio\+\_\+probe}} (device\+\_\+t \mbox{\hyperlink{gpiobus__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
static int \mbox{\hyperlink{dwgpio_8c_a289c269b5bc9693b748d8c5dd8f816c5}{dwgpio\+\_\+attach}} (device\+\_\+t \mbox{\hyperlink{gpiobus__if_8m_a5b84348f4a546955afe3156099e597f4}{dev}})
\item 
static void \mbox{\hyperlink{dwgpio_8c_a041735fae02d7265413273360d0d2f9a}{dwgpio\+\_\+pin\+\_\+configure}} (struct \mbox{\hyperlink{structdwgpio__softc}{dwgpio\+\_\+softc}} $\ast$sc, struct gpio\+\_\+pin $\ast$\mbox{\hyperlink{gpio__if_8m_ad42c8c8e9330d63f923bc677a1810042}{pin}}, unsigned int \mbox{\hyperlink{gpiobus__if_8m_a773b39d480759f67926cb18ae2219281}{flags}})
\item 
\mbox{\hyperlink{dwgpio_8c_aa6bf888337548960f032d266feb3a67e}{DRIVER\+\_\+\+MODULE}} (\mbox{\hyperlink{dwgpio__if_8m_a0c420c491a0894e75f4a2bdc744c8de1}{dwgpio}}, dwgpiobus, \mbox{\hyperlink{dwgpio_8c_a1277d8f9d41eb9018d5f879d6d28b3bb}{dwgpio\+\_\+driver}}, \mbox{\hyperlink{dwgpio_8c_aa05efe54be754252b044715c73f3748d}{dwgpio\+\_\+devclass}}, 0, 0)
\end{DoxyCompactItemize}
\doxysubsection*{Variables}
\begin{DoxyCompactItemize}
\item 
static device\+\_\+method\+\_\+t \mbox{\hyperlink{dwgpio_8c_aae1f4f4cc2b19403c36c98c4b5e936dc}{dwgpio\+\_\+methods}} \mbox{[}$\,$\mbox{]}
\item 
static driver\+\_\+t \mbox{\hyperlink{dwgpio_8c_a1277d8f9d41eb9018d5f879d6d28b3bb}{dwgpio\+\_\+driver}}
\item 
static devclass\+\_\+t \mbox{\hyperlink{dwgpio_8c_aa05efe54be754252b044715c73f3748d}{dwgpio\+\_\+devclass}}
\end{DoxyCompactItemize}


\doxysubsection{Macro Definition Documentation}
\mbox{\Hypertarget{dwgpio_8c_a71c9bed95a7512fe874d8edec1c6690f}\label{dwgpio_8c_a71c9bed95a7512fe874d8edec1c6690f}} 
\index{dwgpio.c@{dwgpio.c}!DEFAULT\_CAPS@{DEFAULT\_CAPS}}
\index{DEFAULT\_CAPS@{DEFAULT\_CAPS}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{DEFAULT\_CAPS}{DEFAULT\_CAPS}}
{\footnotesize\ttfamily \#define DEFAULT\+\_\+\+CAPS~(GPIO\+\_\+\+PIN\+\_\+\+INPUT $\vert$ GPIO\+\_\+\+PIN\+\_\+\+OUTPUT)}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00094}{94}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_a1e0d3172a40157da136d87a5988b7556}\label{dwgpio_8c_a1e0d3172a40157da136d87a5988b7556}} 
\index{dwgpio.c@{dwgpio.c}!ENCODED\_ID\_PWIDTH\_M@{ENCODED\_ID\_PWIDTH\_M}}
\index{ENCODED\_ID\_PWIDTH\_M@{ENCODED\_ID\_PWIDTH\_M}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{ENCODED\_ID\_PWIDTH\_M}{ENCODED\_ID\_PWIDTH\_M}}
{\footnotesize\ttfamily \#define ENCODED\+\_\+\+ID\+\_\+\+PWIDTH\+\_\+M~0x1f /$\ast$ Width of GPIO Port N Mask $\ast$/}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00085}{85}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_a4da396abc99eb7504228bd889cf3c684}\label{dwgpio_8c_a4da396abc99eb7504228bd889cf3c684}} 
\index{dwgpio.c@{dwgpio.c}!ENCODED\_ID\_PWIDTH\_S@{ENCODED\_ID\_PWIDTH\_S}}
\index{ENCODED\_ID\_PWIDTH\_S@{ENCODED\_ID\_PWIDTH\_S}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{ENCODED\_ID\_PWIDTH\_S}{ENCODED\_ID\_PWIDTH\_S}}
{\footnotesize\ttfamily \#define ENCODED\+\_\+\+ID\+\_\+\+PWIDTH\+\_\+S(\begin{DoxyParamCaption}\item[{}]{n }\end{DoxyParamCaption})~(5 $\ast$ n) /$\ast$ Width of GPIO Port N Shift $\ast$/}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00086}{86}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_af03d8e2b3692acecf61701ee3f190b9f}\label{dwgpio_8c_af03d8e2b3692acecf61701ee3f190b9f}} 
\index{dwgpio.c@{dwgpio.c}!GPIO\_CONFIG\_REG1@{GPIO\_CONFIG\_REG1}}
\index{GPIO\_CONFIG\_REG1@{GPIO\_CONFIG\_REG1}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{GPIO\_CONFIG\_REG1}{GPIO\_CONFIG\_REG1}}
{\footnotesize\ttfamily \#define GPIO\+\_\+\+CONFIG\+\_\+\+REG1~0x74 /$\ast$ Configuration Register 1 $\ast$/}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00087}{87}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_a3b97234f852c6cfc401584a1962e970e}\label{dwgpio_8c_a3b97234f852c6cfc401584a1962e970e}} 
\index{dwgpio.c@{dwgpio.c}!GPIO\_CONFIG\_REG2@{GPIO\_CONFIG\_REG2}}
\index{GPIO\_CONFIG\_REG2@{GPIO\_CONFIG\_REG2}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{GPIO\_CONFIG\_REG2}{GPIO\_CONFIG\_REG2}}
{\footnotesize\ttfamily \#define GPIO\+\_\+\+CONFIG\+\_\+\+REG2~0x70 /$\ast$ Configuration Register 2 $\ast$/}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00084}{84}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_a2da85a8ef9c12d85e6f64fdf306b13d9}\label{dwgpio_8c_a2da85a8ef9c12d85e6f64fdf306b13d9}} 
\index{dwgpio.c@{dwgpio.c}!GPIO\_DEBOUNCE@{GPIO\_DEBOUNCE}}
\index{GPIO\_DEBOUNCE@{GPIO\_DEBOUNCE}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{GPIO\_DEBOUNCE}{GPIO\_DEBOUNCE}}
{\footnotesize\ttfamily \#define GPIO\+\_\+\+DEBOUNCE~0x48 /$\ast$ Debounce Enable Register $\ast$/}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00078}{78}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_a62aaf301547ed9ae2f25c56fe9a0cecb}\label{dwgpio_8c_a62aaf301547ed9ae2f25c56fe9a0cecb}} 
\index{dwgpio.c@{dwgpio.c}!GPIO\_EXT\_PORT@{GPIO\_EXT\_PORT}}
\index{GPIO\_EXT\_PORT@{GPIO\_EXT\_PORT}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{GPIO\_EXT\_PORT}{GPIO\_EXT\_PORT}}
{\footnotesize\ttfamily \#define GPIO\+\_\+\+EXT\+\_\+\+PORT(\begin{DoxyParamCaption}\item[{}]{n }\end{DoxyParamCaption})~(0x50 + 0x4 $\ast$ (n)) /$\ast$ External Port n $\ast$/}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00080}{80}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_a986b030dcffbcd3e6ffd014d638406ed}\label{dwgpio_8c_a986b030dcffbcd3e6ffd014d638406ed}} 
\index{dwgpio.c@{dwgpio.c}!GPIO\_ID\_CODE@{GPIO\_ID\_CODE}}
\index{GPIO\_ID\_CODE@{GPIO\_ID\_CODE}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{GPIO\_ID\_CODE}{GPIO\_ID\_CODE}}
{\footnotesize\ttfamily \#define GPIO\+\_\+\+ID\+\_\+\+CODE~0x64 /$\ast$ ID Code Register $\ast$/}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00082}{82}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_a45678896e6ddde7e1de7b40d66771856}\label{dwgpio_8c_a45678896e6ddde7e1de7b40d66771856}} 
\index{dwgpio.c@{dwgpio.c}!GPIO\_INT\_POLARITY@{GPIO\_INT\_POLARITY}}
\index{GPIO\_INT\_POLARITY@{GPIO\_INT\_POLARITY}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{GPIO\_INT\_POLARITY}{GPIO\_INT\_POLARITY}}
{\footnotesize\ttfamily \#define GPIO\+\_\+\+INT\+\_\+\+POLARITY~0x3C /$\ast$ Interrupt Polarity Register $\ast$/}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00075}{75}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_a2bcaa378e74035ca12109b088aa8dca6}\label{dwgpio_8c_a2bcaa378e74035ca12109b088aa8dca6}} 
\index{dwgpio.c@{dwgpio.c}!GPIO\_INTEN@{GPIO\_INTEN}}
\index{GPIO\_INTEN@{GPIO\_INTEN}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{GPIO\_INTEN}{GPIO\_INTEN}}
{\footnotesize\ttfamily \#define GPIO\+\_\+\+INTEN~0x30 /$\ast$ Interrupt Enable Register $\ast$/}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00072}{72}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_ae6a7f92b0c59cc936bb524acb9536c01}\label{dwgpio_8c_ae6a7f92b0c59cc936bb524acb9536c01}} 
\index{dwgpio.c@{dwgpio.c}!GPIO\_INTMASK@{GPIO\_INTMASK}}
\index{GPIO\_INTMASK@{GPIO\_INTMASK}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{GPIO\_INTMASK}{GPIO\_INTMASK}}
{\footnotesize\ttfamily \#define GPIO\+\_\+\+INTMASK~0x34 /$\ast$ Interrupt Mask Register $\ast$/}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00073}{73}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_a0394f7c3cd20ec1e78aa491d88c879be}\label{dwgpio_8c_a0394f7c3cd20ec1e78aa491d88c879be}} 
\index{dwgpio.c@{dwgpio.c}!GPIO\_INTSTATUS@{GPIO\_INTSTATUS}}
\index{GPIO\_INTSTATUS@{GPIO\_INTSTATUS}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{GPIO\_INTSTATUS}{GPIO\_INTSTATUS}}
{\footnotesize\ttfamily \#define GPIO\+\_\+\+INTSTATUS~0x40 /$\ast$ Interrupt Status Register $\ast$/}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00076}{76}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_ac13143e740d941bd064ec144e8f74529}\label{dwgpio_8c_ac13143e740d941bd064ec144e8f74529}} 
\index{dwgpio.c@{dwgpio.c}!GPIO\_INTTYPE\_LEVEL@{GPIO\_INTTYPE\_LEVEL}}
\index{GPIO\_INTTYPE\_LEVEL@{GPIO\_INTTYPE\_LEVEL}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{GPIO\_INTTYPE\_LEVEL}{GPIO\_INTTYPE\_LEVEL}}
{\footnotesize\ttfamily \#define GPIO\+\_\+\+INTTYPE\+\_\+\+LEVEL~0x38 /$\ast$ Interrupt Level Register $\ast$/}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00074}{74}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_aef85ce9faaef7c35e72991cba2627012}\label{dwgpio_8c_aef85ce9faaef7c35e72991cba2627012}} 
\index{dwgpio.c@{dwgpio.c}!GPIO\_LOCK@{GPIO\_LOCK}}
\index{GPIO\_LOCK@{GPIO\_LOCK}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{GPIO\_LOCK}{GPIO\_LOCK}}
{\footnotesize\ttfamily \#define GPIO\+\_\+\+LOCK(\begin{DoxyParamCaption}\item[{}]{\+\_\+sc }\end{DoxyParamCaption})~mtx\+\_\+lock(\&(\+\_\+sc)-\/$>$sc\+\_\+mtx)}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00091}{91}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_a4fafa6f45bda658b9a38ebdd5ded2c3d}\label{dwgpio_8c_a4fafa6f45bda658b9a38ebdd5ded2c3d}} 
\index{dwgpio.c@{dwgpio.c}!GPIO\_LS\_SYNC@{GPIO\_LS\_SYNC}}
\index{GPIO\_LS\_SYNC@{GPIO\_LS\_SYNC}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{GPIO\_LS\_SYNC}{GPIO\_LS\_SYNC}}
{\footnotesize\ttfamily \#define GPIO\+\_\+\+LS\+\_\+\+SYNC~0x60 /$\ast$ Synchronization Level Register $\ast$/}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00081}{81}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_a3169293f3eecab055ed5a1647927f866}\label{dwgpio_8c_a3169293f3eecab055ed5a1647927f866}} 
\index{dwgpio.c@{dwgpio.c}!GPIO\_PORTA\_EOI@{GPIO\_PORTA\_EOI}}
\index{GPIO\_PORTA\_EOI@{GPIO\_PORTA\_EOI}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{GPIO\_PORTA\_EOI}{GPIO\_PORTA\_EOI}}
{\footnotesize\ttfamily \#define GPIO\+\_\+\+PORTA\+\_\+\+EOI~0x4C /$\ast$ Clear Interrupt Register $\ast$/}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00079}{79}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_a5ca7df6d6760225ce771a74ab6866df6}\label{dwgpio_8c_a5ca7df6d6760225ce771a74ab6866df6}} 
\index{dwgpio.c@{dwgpio.c}!GPIO\_RAW\_INTSTATUS@{GPIO\_RAW\_INTSTATUS}}
\index{GPIO\_RAW\_INTSTATUS@{GPIO\_RAW\_INTSTATUS}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{GPIO\_RAW\_INTSTATUS}{GPIO\_RAW\_INTSTATUS}}
{\footnotesize\ttfamily \#define GPIO\+\_\+\+RAW\+\_\+\+INTSTATUS~0x44 /$\ast$ Raw Interrupt Status Register $\ast$/}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00077}{77}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_a17d60092010e37f13b5bfce175fea3a1}\label{dwgpio_8c_a17d60092010e37f13b5bfce175fea3a1}} 
\index{dwgpio.c@{dwgpio.c}!GPIO\_SWPORT\_DDR@{GPIO\_SWPORT\_DDR}}
\index{GPIO\_SWPORT\_DDR@{GPIO\_SWPORT\_DDR}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{GPIO\_SWPORT\_DDR}{GPIO\_SWPORT\_DDR}}
{\footnotesize\ttfamily \#define GPIO\+\_\+\+SWPORT\+\_\+\+DDR(\begin{DoxyParamCaption}\item[{}]{n }\end{DoxyParamCaption})~(0x04 + 0xc $\ast$ (n)) /$\ast$ Port n Data Direction $\ast$/}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00071}{71}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_a72906ccc0bbe2c66aac7da03737182a6}\label{dwgpio_8c_a72906ccc0bbe2c66aac7da03737182a6}} 
\index{dwgpio.c@{dwgpio.c}!GPIO\_SWPORT\_DR@{GPIO\_SWPORT\_DR}}
\index{GPIO\_SWPORT\_DR@{GPIO\_SWPORT\_DR}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{GPIO\_SWPORT\_DR}{GPIO\_SWPORT\_DR}}
{\footnotesize\ttfamily \#define GPIO\+\_\+\+SWPORT\+\_\+\+DR(\begin{DoxyParamCaption}\item[{}]{n }\end{DoxyParamCaption})~(0x00 + 0xc $\ast$ (n)) /$\ast$ Port n Data Register $\ast$/}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00070}{70}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_a4115c303b4fa85d9131989ac3838599f}\label{dwgpio_8c_a4115c303b4fa85d9131989ac3838599f}} 
\index{dwgpio.c@{dwgpio.c}!GPIO\_UNLOCK@{GPIO\_UNLOCK}}
\index{GPIO\_UNLOCK@{GPIO\_UNLOCK}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{GPIO\_UNLOCK}{GPIO\_UNLOCK}}
{\footnotesize\ttfamily \#define GPIO\+\_\+\+UNLOCK(\begin{DoxyParamCaption}\item[{}]{\+\_\+sc }\end{DoxyParamCaption})~mtx\+\_\+unlock(\&(\+\_\+sc)-\/$>$sc\+\_\+mtx)}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00092}{92}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_a2da89311b866a6530932804e1fb2728a}\label{dwgpio_8c_a2da89311b866a6530932804e1fb2728a}} 
\index{dwgpio.c@{dwgpio.c}!GPIO\_VER\_ID\_CODE@{GPIO\_VER\_ID\_CODE}}
\index{GPIO\_VER\_ID\_CODE@{GPIO\_VER\_ID\_CODE}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{GPIO\_VER\_ID\_CODE}{GPIO\_VER\_ID\_CODE}}
{\footnotesize\ttfamily \#define GPIO\+\_\+\+VER\+\_\+\+ID\+\_\+\+CODE~0x6C /$\ast$ GPIO Version Register $\ast$/}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00083}{83}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_a1c899fae586d7b524e64f6a96d584850}\label{dwgpio_8c_a1c899fae586d7b524e64f6a96d584850}} 
\index{dwgpio.c@{dwgpio.c}!NR\_GPIO\_MAX@{NR\_GPIO\_MAX}}
\index{NR\_GPIO\_MAX@{NR\_GPIO\_MAX}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{NR\_GPIO\_MAX}{NR\_GPIO\_MAX}}
{\footnotesize\ttfamily \#define NR\+\_\+\+GPIO\+\_\+\+MAX~32 /$\ast$ Maximum pins per port $\ast$/}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00089}{89}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_a26db9894cb8f31733db71eb61eb0ac1f}\label{dwgpio_8c_a26db9894cb8f31733db71eb61eb0ac1f}} 
\index{dwgpio.c@{dwgpio.c}!READ4@{READ4}}
\index{READ4@{READ4}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{READ4}{READ4}}
{\footnotesize\ttfamily \#define READ4(\begin{DoxyParamCaption}\item[{}]{\+\_\+sc,  }\item[{}]{\+\_\+reg }\end{DoxyParamCaption})~DWGPIO\+\_\+\+READ((\+\_\+sc)-\/$>$parent, \+\_\+reg)}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00067}{67}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_a448f7c60f1de233253b7e2234089a8a8}\label{dwgpio_8c_a448f7c60f1de233253b7e2234089a8a8}} 
\index{dwgpio.c@{dwgpio.c}!WRITE4@{WRITE4}}
\index{WRITE4@{WRITE4}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{WRITE4}{WRITE4}}
{\footnotesize\ttfamily \#define WRITE4(\begin{DoxyParamCaption}\item[{}]{\+\_\+sc,  }\item[{}]{\+\_\+reg,  }\item[{}]{\+\_\+val }\end{DoxyParamCaption})~DWGPIO\+\_\+\+WRITE((\+\_\+sc)-\/$>$parent, \+\_\+reg, \+\_\+val)}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00068}{68}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.



\doxysubsection{Function Documentation}
\mbox{\Hypertarget{dwgpio_8c_a8c3ef283470a68cd30afe9b8a72cb60f}\label{dwgpio_8c_a8c3ef283470a68cd30afe9b8a72cb60f}} 
\index{dwgpio.c@{dwgpio.c}!\_\_FBSDID@{\_\_FBSDID}}
\index{\_\_FBSDID@{\_\_FBSDID}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{\_\_FBSDID()}{\_\_FBSDID()}}
{\footnotesize\ttfamily \+\_\+\+\_\+\+FBSDID (\begin{DoxyParamCaption}\item[{\char`\"{}\$Free\+BSD\$\char`\"{}}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{dwgpio_8c_aa6bf888337548960f032d266feb3a67e}\label{dwgpio_8c_aa6bf888337548960f032d266feb3a67e}} 
\index{dwgpio.c@{dwgpio.c}!DRIVER\_MODULE@{DRIVER\_MODULE}}
\index{DRIVER\_MODULE@{DRIVER\_MODULE}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{DRIVER\_MODULE()}{DRIVER\_MODULE()}}
{\footnotesize\ttfamily DRIVER\+\_\+\+MODULE (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{dwgpio__if_8m_a0c420c491a0894e75f4a2bdc744c8de1}{dwgpio}}}]{,  }\item[{dwgpiobus}]{,  }\item[{\mbox{\hyperlink{dwgpio_8c_a1277d8f9d41eb9018d5f879d6d28b3bb}{dwgpio\+\_\+driver}}}]{,  }\item[{\mbox{\hyperlink{dwgpio_8c_aa05efe54be754252b044715c73f3748d}{dwgpio\+\_\+devclass}}}]{,  }\item[{0}]{,  }\item[{0}]{ }\end{DoxyParamCaption})}

\mbox{\Hypertarget{dwgpio_8c_a289c269b5bc9693b748d8c5dd8f816c5}\label{dwgpio_8c_a289c269b5bc9693b748d8c5dd8f816c5}} 
\index{dwgpio.c@{dwgpio.c}!dwgpio\_attach@{dwgpio\_attach}}
\index{dwgpio\_attach@{dwgpio\_attach}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{dwgpio\_attach()}{dwgpio\_attach()}}
{\footnotesize\ttfamily static int dwgpio\+\_\+attach (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00135}{135}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.



References \mbox{\hyperlink{dwgpio_8c_source_l00111}{dwgpio\+\_\+softc\+::busdev}}, \mbox{\hyperlink{dwgpio_8c_source_l00094}{DEFAULT\+\_\+\+CAPS}}, \mbox{\hyperlink{dwgpio_8c_source_l00110}{dwgpio\+\_\+softc\+::dev}}, \mbox{\hyperlink{gpio__if_8m_source_l00154}{dev}}, \mbox{\hyperlink{dwgpio_8c_source_l00085}{ENCODED\+\_\+\+ID\+\_\+\+PWIDTH\+\_\+M}}, \mbox{\hyperlink{dwgpio_8c_source_l00086}{ENCODED\+\_\+\+ID\+\_\+\+PWIDTH\+\_\+S}}, \mbox{\hyperlink{dwgpio_8c_source_l00084}{GPIO\+\_\+\+CONFIG\+\_\+\+REG2}}, \mbox{\hyperlink{dwgpio_8c_source_l00114}{dwgpio\+\_\+softc\+::gpio\+\_\+npins}}, \mbox{\hyperlink{dwgpio_8c_source_l00115}{dwgpio\+\_\+softc\+::gpio\+\_\+pins}}, \mbox{\hyperlink{dwgpio_8c_source_l00071}{GPIO\+\_\+\+SWPORT\+\_\+\+DDR}}, \mbox{\hyperlink{dwgpio_8c_source_l00083}{GPIO\+\_\+\+VER\+\_\+\+ID\+\_\+\+CODE}}, \mbox{\hyperlink{gpiobus_8c_source_l00301}{gpiobus\+\_\+attach\+\_\+bus()}}, \mbox{\hyperlink{dwgpio_8c_source_l00116}{dwgpio\+\_\+softc\+::node}}, \mbox{\hyperlink{dwgpio_8c_source_l00112}{dwgpio\+\_\+softc\+::parent}}, \mbox{\hyperlink{dwgpio_8c_source_l00117}{dwgpio\+\_\+softc\+::port}}, \mbox{\hyperlink{dwgpio_8c_source_l00067}{READ4}}, and \mbox{\hyperlink{dwgpio_8c_source_l00113}{dwgpio\+\_\+softc\+::sc\+\_\+mtx}}.

Here is the call graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d6/d1d/dwgpio_8c_a289c269b5bc9693b748d8c5dd8f816c5_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{dwgpio_8c_ae151fc601f6367a4e378b2146411587c}\label{dwgpio_8c_ae151fc601f6367a4e378b2146411587c}} 
\index{dwgpio.c@{dwgpio.c}!dwgpio\_get\_bus@{dwgpio\_get\_bus}}
\index{dwgpio\_get\_bus@{dwgpio\_get\_bus}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{dwgpio\_get\_bus()}{dwgpio\_get\_bus()}}
{\footnotesize\ttfamily static device\+\_\+t dwgpio\+\_\+get\+\_\+bus (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00183}{183}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.



References \mbox{\hyperlink{dwgpio_8c_source_l00111}{dwgpio\+\_\+softc\+::busdev}}, and \mbox{\hyperlink{gpio__if_8m_source_l00154}{dev}}.

\mbox{\Hypertarget{dwgpio_8c_a041735fae02d7265413273360d0d2f9a}\label{dwgpio_8c_a041735fae02d7265413273360d0d2f9a}} 
\index{dwgpio.c@{dwgpio.c}!dwgpio\_pin\_configure@{dwgpio\_pin\_configure}}
\index{dwgpio\_pin\_configure@{dwgpio\_pin\_configure}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{dwgpio\_pin\_configure()}{dwgpio\_pin\_configure()}}
{\footnotesize\ttfamily static void dwgpio\+\_\+pin\+\_\+configure (\begin{DoxyParamCaption}\item[{struct \mbox{\hyperlink{structdwgpio__softc}{dwgpio\+\_\+softc}} $\ast$}]{sc,  }\item[{struct gpio\+\_\+pin $\ast$}]{pin,  }\item[{unsigned int}]{flags }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00322}{322}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.



References \mbox{\hyperlink{gpio__if_8m_source_l00128}{flags}}, \mbox{\hyperlink{dwgpio_8c_source_l00091}{GPIO\+\_\+\+LOCK}}, \mbox{\hyperlink{dwgpio_8c_source_l00071}{GPIO\+\_\+\+SWPORT\+\_\+\+DDR}}, \mbox{\hyperlink{dwgpio_8c_source_l00092}{GPIO\+\_\+\+UNLOCK}}, \mbox{\hyperlink{gpio__if_8m_source_l00158}{pin}}, \mbox{\hyperlink{dwgpio_8c_source_l00117}{dwgpio\+\_\+softc\+::port}}, \mbox{\hyperlink{dwgpio_8c_source_l00067}{READ4}}, and \mbox{\hyperlink{dwgpio_8c_source_l00068}{WRITE4}}.



Referenced by \mbox{\hyperlink{dwgpio_8c_source_l00351}{dwgpio\+\_\+pin\+\_\+setflags()}}.

Here is the caller graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d6/d1d/dwgpio_8c_a041735fae02d7265413273360d0d2f9a_icgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{dwgpio_8c_a95c66acdd1bf564ec93d97962b449c1d}\label{dwgpio_8c_a95c66acdd1bf564ec93d97962b449c1d}} 
\index{dwgpio.c@{dwgpio.c}!dwgpio\_pin\_get@{dwgpio\_pin\_get}}
\index{dwgpio\_pin\_get@{dwgpio\_pin\_get}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{dwgpio\_pin\_get()}{dwgpio\_pin\_get()}}
{\footnotesize\ttfamily static int dwgpio\+\_\+pin\+\_\+get (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{uint32\+\_\+t}]{pin,  }\item[{unsigned int $\ast$}]{val }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00271}{271}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.



References \mbox{\hyperlink{gpio__if_8m_source_l00154}{dev}}, \mbox{\hyperlink{dwgpio_8c_source_l00080}{GPIO\+\_\+\+EXT\+\_\+\+PORT}}, \mbox{\hyperlink{dwgpio_8c_source_l00091}{GPIO\+\_\+\+LOCK}}, \mbox{\hyperlink{dwgpio_8c_source_l00114}{dwgpio\+\_\+softc\+::gpio\+\_\+npins}}, \mbox{\hyperlink{dwgpio_8c_source_l00115}{dwgpio\+\_\+softc\+::gpio\+\_\+pins}}, \mbox{\hyperlink{dwgpio_8c_source_l00092}{GPIO\+\_\+\+UNLOCK}}, \mbox{\hyperlink{gpio__if_8m_source_l00158}{pin}}, \mbox{\hyperlink{dwgpio_8c_source_l00117}{dwgpio\+\_\+softc\+::port}}, \mbox{\hyperlink{dwgpio_8c_source_l00067}{READ4}}, and \mbox{\hyperlink{dwgpio__if_8m_source_l00043}{val}}.

\mbox{\Hypertarget{dwgpio_8c_ad3e96c278450508e0a41fb6733786bbc}\label{dwgpio_8c_ad3e96c278450508e0a41fb6733786bbc}} 
\index{dwgpio.c@{dwgpio.c}!dwgpio\_pin\_getcaps@{dwgpio\_pin\_getcaps}}
\index{dwgpio\_pin\_getcaps@{dwgpio\_pin\_getcaps}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{dwgpio\_pin\_getcaps()}{dwgpio\_pin\_getcaps()}}
{\footnotesize\ttfamily static int dwgpio\+\_\+pin\+\_\+getcaps (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{uint32\+\_\+t}]{pin,  }\item[{uint32\+\_\+t $\ast$}]{caps }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00227}{227}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.



References \mbox{\hyperlink{gpio__if_8m_source_l00119}{caps}}, \mbox{\hyperlink{gpio__if_8m_source_l00154}{dev}}, \mbox{\hyperlink{dwgpio_8c_source_l00091}{GPIO\+\_\+\+LOCK}}, \mbox{\hyperlink{dwgpio_8c_source_l00114}{dwgpio\+\_\+softc\+::gpio\+\_\+npins}}, \mbox{\hyperlink{dwgpio_8c_source_l00115}{dwgpio\+\_\+softc\+::gpio\+\_\+pins}}, \mbox{\hyperlink{dwgpio_8c_source_l00092}{GPIO\+\_\+\+UNLOCK}}, and \mbox{\hyperlink{gpio__if_8m_source_l00158}{pin}}.

\mbox{\Hypertarget{dwgpio_8c_a8a1c67665dfaaee09d7d00e722bcea42}\label{dwgpio_8c_a8a1c67665dfaaee09d7d00e722bcea42}} 
\index{dwgpio.c@{dwgpio.c}!dwgpio\_pin\_getflags@{dwgpio\_pin\_getflags}}
\index{dwgpio\_pin\_getflags@{dwgpio\_pin\_getflags}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{dwgpio\_pin\_getflags()}{dwgpio\_pin\_getflags()}}
{\footnotesize\ttfamily static int dwgpio\+\_\+pin\+\_\+getflags (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{uint32\+\_\+t}]{pin,  }\item[{uint32\+\_\+t $\ast$}]{flags }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00249}{249}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.



References \mbox{\hyperlink{gpio__if_8m_source_l00154}{dev}}, \mbox{\hyperlink{gpio__if_8m_source_l00128}{flags}}, \mbox{\hyperlink{dwgpio_8c_source_l00091}{GPIO\+\_\+\+LOCK}}, \mbox{\hyperlink{dwgpio_8c_source_l00114}{dwgpio\+\_\+softc\+::gpio\+\_\+npins}}, \mbox{\hyperlink{dwgpio_8c_source_l00115}{dwgpio\+\_\+softc\+::gpio\+\_\+pins}}, \mbox{\hyperlink{dwgpio_8c_source_l00092}{GPIO\+\_\+\+UNLOCK}}, and \mbox{\hyperlink{gpio__if_8m_source_l00158}{pin}}.

\mbox{\Hypertarget{dwgpio_8c_af10e7b8c87a90748eb7a628bbff4eab1}\label{dwgpio_8c_af10e7b8c87a90748eb7a628bbff4eab1}} 
\index{dwgpio.c@{dwgpio.c}!dwgpio\_pin\_getname@{dwgpio\_pin\_getname}}
\index{dwgpio\_pin\_getname@{dwgpio\_pin\_getname}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{dwgpio\_pin\_getname()}{dwgpio\_pin\_getname()}}
{\footnotesize\ttfamily static int dwgpio\+\_\+pin\+\_\+getname (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{uint32\+\_\+t}]{pin,  }\item[{char $\ast$}]{name }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00205}{205}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.



References \mbox{\hyperlink{gpio__if_8m_source_l00154}{dev}}, \mbox{\hyperlink{dwgpio_8c_source_l00091}{GPIO\+\_\+\+LOCK}}, \mbox{\hyperlink{dwgpio_8c_source_l00114}{dwgpio\+\_\+softc\+::gpio\+\_\+npins}}, \mbox{\hyperlink{dwgpio_8c_source_l00115}{dwgpio\+\_\+softc\+::gpio\+\_\+pins}}, \mbox{\hyperlink{dwgpio_8c_source_l00092}{GPIO\+\_\+\+UNLOCK}}, \mbox{\hyperlink{gpio__if_8m_source_l00137}{name}}, and \mbox{\hyperlink{gpio__if_8m_source_l00158}{pin}}.

\mbox{\Hypertarget{dwgpio_8c_a543dd66d4e450c4d2535f5331c550127}\label{dwgpio_8c_a543dd66d4e450c4d2535f5331c550127}} 
\index{dwgpio.c@{dwgpio.c}!dwgpio\_pin\_max@{dwgpio\_pin\_max}}
\index{dwgpio\_pin\_max@{dwgpio\_pin\_max}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{dwgpio\_pin\_max()}{dwgpio\_pin\_max()}}
{\footnotesize\ttfamily static int dwgpio\+\_\+pin\+\_\+max (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{int $\ast$}]{maxpin }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00193}{193}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.



References \mbox{\hyperlink{gpio__if_8m_source_l00154}{dev}}, \mbox{\hyperlink{dwgpio_8c_source_l00114}{dwgpio\+\_\+softc\+::gpio\+\_\+npins}}, and \mbox{\hyperlink{gpio__if_8m_source_l00084}{maxpin}}.

\mbox{\Hypertarget{dwgpio_8c_ac726c6b4f79e3732249a117358ff38c3}\label{dwgpio_8c_ac726c6b4f79e3732249a117358ff38c3}} 
\index{dwgpio.c@{dwgpio.c}!dwgpio\_pin\_set@{dwgpio\_pin\_set}}
\index{dwgpio\_pin\_set@{dwgpio\_pin\_set}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{dwgpio\_pin\_set()}{dwgpio\_pin\_set()}}
{\footnotesize\ttfamily static int dwgpio\+\_\+pin\+\_\+set (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{uint32\+\_\+t}]{pin,  }\item[{unsigned int}]{value }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00371}{371}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.



References \mbox{\hyperlink{gpio__if_8m_source_l00154}{dev}}, \mbox{\hyperlink{dwgpio_8c_source_l00091}{GPIO\+\_\+\+LOCK}}, \mbox{\hyperlink{dwgpio_8c_source_l00114}{dwgpio\+\_\+softc\+::gpio\+\_\+npins}}, \mbox{\hyperlink{dwgpio_8c_source_l00115}{dwgpio\+\_\+softc\+::gpio\+\_\+pins}}, \mbox{\hyperlink{dwgpio_8c_source_l00070}{GPIO\+\_\+\+SWPORT\+\_\+\+DR}}, \mbox{\hyperlink{dwgpio_8c_source_l00092}{GPIO\+\_\+\+UNLOCK}}, \mbox{\hyperlink{gpio__if_8m_source_l00158}{pin}}, \mbox{\hyperlink{dwgpio_8c_source_l00117}{dwgpio\+\_\+softc\+::port}}, \mbox{\hyperlink{dwgpio_8c_source_l00067}{READ4}}, and \mbox{\hyperlink{dwgpio_8c_source_l00068}{WRITE4}}.

\mbox{\Hypertarget{dwgpio_8c_aa7ac9425881d243acd80df96973f4bcf}\label{dwgpio_8c_aa7ac9425881d243acd80df96973f4bcf}} 
\index{dwgpio.c@{dwgpio.c}!dwgpio\_pin\_setflags@{dwgpio\_pin\_setflags}}
\index{dwgpio\_pin\_setflags@{dwgpio\_pin\_setflags}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{dwgpio\_pin\_setflags()}{dwgpio\_pin\_setflags()}}
{\footnotesize\ttfamily static int dwgpio\+\_\+pin\+\_\+setflags (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{uint32\+\_\+t}]{pin,  }\item[{uint32\+\_\+t}]{flags }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00351}{351}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.



References \mbox{\hyperlink{gpio__if_8m_source_l00154}{dev}}, \mbox{\hyperlink{dwgpio_8c_source_l00322}{dwgpio\+\_\+pin\+\_\+configure()}}, \mbox{\hyperlink{gpio__if_8m_source_l00128}{flags}}, \mbox{\hyperlink{dwgpio_8c_source_l00114}{dwgpio\+\_\+softc\+::gpio\+\_\+npins}}, \mbox{\hyperlink{dwgpio_8c_source_l00115}{dwgpio\+\_\+softc\+::gpio\+\_\+pins}}, and \mbox{\hyperlink{gpio__if_8m_source_l00158}{pin}}.

Here is the call graph for this function\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{d6/d1d/dwgpio_8c_aa7ac9425881d243acd80df96973f4bcf_cgraph}
\end{center}
\end{figure}
\mbox{\Hypertarget{dwgpio_8c_a5ad3f444129346a342a70e023c79ffca}\label{dwgpio_8c_a5ad3f444129346a342a70e023c79ffca}} 
\index{dwgpio.c@{dwgpio.c}!dwgpio\_pin\_toggle@{dwgpio\_pin\_toggle}}
\index{dwgpio\_pin\_toggle@{dwgpio\_pin\_toggle}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{dwgpio\_pin\_toggle()}{dwgpio\_pin\_toggle()}}
{\footnotesize\ttfamily static int dwgpio\+\_\+pin\+\_\+toggle (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev,  }\item[{uint32\+\_\+t}]{pin }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00293}{293}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.



References \mbox{\hyperlink{gpio__if_8m_source_l00154}{dev}}, \mbox{\hyperlink{dwgpio_8c_source_l00091}{GPIO\+\_\+\+LOCK}}, \mbox{\hyperlink{dwgpio_8c_source_l00114}{dwgpio\+\_\+softc\+::gpio\+\_\+npins}}, \mbox{\hyperlink{dwgpio_8c_source_l00115}{dwgpio\+\_\+softc\+::gpio\+\_\+pins}}, \mbox{\hyperlink{dwgpio_8c_source_l00070}{GPIO\+\_\+\+SWPORT\+\_\+\+DR}}, \mbox{\hyperlink{dwgpio_8c_source_l00092}{GPIO\+\_\+\+UNLOCK}}, \mbox{\hyperlink{gpio__if_8m_source_l00158}{pin}}, \mbox{\hyperlink{dwgpio_8c_source_l00117}{dwgpio\+\_\+softc\+::port}}, \mbox{\hyperlink{dwgpio_8c_source_l00067}{READ4}}, and \mbox{\hyperlink{dwgpio_8c_source_l00068}{WRITE4}}.

\mbox{\Hypertarget{dwgpio_8c_a420903e96c1b59e2a9b255345764573a}\label{dwgpio_8c_a420903e96c1b59e2a9b255345764573a}} 
\index{dwgpio.c@{dwgpio.c}!dwgpio\_probe@{dwgpio\_probe}}
\index{dwgpio\_probe@{dwgpio\_probe}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{dwgpio\_probe()}{dwgpio\_probe()}}
{\footnotesize\ttfamily static int dwgpio\+\_\+probe (\begin{DoxyParamCaption}\item[{device\+\_\+t}]{dev }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00121}{121}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.



References \mbox{\hyperlink{gpio__if_8m_source_l00154}{dev}}.



\doxysubsection{Variable Documentation}
\mbox{\Hypertarget{dwgpio_8c_aa05efe54be754252b044715c73f3748d}\label{dwgpio_8c_aa05efe54be754252b044715c73f3748d}} 
\index{dwgpio.c@{dwgpio.c}!dwgpio\_devclass@{dwgpio\_devclass}}
\index{dwgpio\_devclass@{dwgpio\_devclass}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{dwgpio\_devclass}{dwgpio\_devclass}}
{\footnotesize\ttfamily devclass\+\_\+t dwgpio\+\_\+devclass\hspace{0.3cm}{\ttfamily [static]}}



Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00422}{422}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_a1277d8f9d41eb9018d5f879d6d28b3bb}\label{dwgpio_8c_a1277d8f9d41eb9018d5f879d6d28b3bb}} 
\index{dwgpio.c@{dwgpio.c}!dwgpio\_driver@{dwgpio\_driver}}
\index{dwgpio\_driver@{dwgpio\_driver}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{dwgpio\_driver}{dwgpio\_driver}}
{\footnotesize\ttfamily driver\+\_\+t dwgpio\+\_\+driver\hspace{0.3cm}{\ttfamily [static]}}

{\bfseries Initial value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{= \{}
\DoxyCodeLine{        \textcolor{stringliteral}{"{}gpio"{}},}
\DoxyCodeLine{        \mbox{\hyperlink{dwgpio_8c_aae1f4f4cc2b19403c36c98c4b5e936dc}{dwgpio\_methods}},}
\DoxyCodeLine{        \textcolor{keyword}{sizeof}(\textcolor{keyword}{struct }\mbox{\hyperlink{structdwgpio__softc}{dwgpio\_softc}}),}
\DoxyCodeLine{\}}

\end{DoxyCode}


Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00416}{416}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

\mbox{\Hypertarget{dwgpio_8c_aae1f4f4cc2b19403c36c98c4b5e936dc}\label{dwgpio_8c_aae1f4f4cc2b19403c36c98c4b5e936dc}} 
\index{dwgpio.c@{dwgpio.c}!dwgpio\_methods@{dwgpio\_methods}}
\index{dwgpio\_methods@{dwgpio\_methods}!dwgpio.c@{dwgpio.c}}
\doxysubsubsection{\texorpdfstring{dwgpio\_methods}{dwgpio\_methods}}
{\footnotesize\ttfamily device\+\_\+method\+\_\+t dwgpio\+\_\+methods\mbox{[}$\,$\mbox{]}\hspace{0.3cm}{\ttfamily [static]}}

{\bfseries Initial value\+:}
\begin{DoxyCode}{0}
\DoxyCodeLine{= \{}
\DoxyCodeLine{        DEVMETHOD(device\_probe,         \mbox{\hyperlink{dwgpio_8c_a420903e96c1b59e2a9b255345764573a}{dwgpio\_probe}}),}
\DoxyCodeLine{        DEVMETHOD(device\_attach,        \mbox{\hyperlink{dwgpio_8c_a289c269b5bc9693b748d8c5dd8f816c5}{dwgpio\_attach}}),}
\DoxyCodeLine{}
\DoxyCodeLine{        }
\DoxyCodeLine{        DEVMETHOD(gpio\_get\_bus,         \mbox{\hyperlink{dwgpio_8c_ae151fc601f6367a4e378b2146411587c}{dwgpio\_get\_bus}}),}
\DoxyCodeLine{        DEVMETHOD(gpio\_pin\_max,         \mbox{\hyperlink{dwgpio_8c_a543dd66d4e450c4d2535f5331c550127}{dwgpio\_pin\_max}}),}
\DoxyCodeLine{        DEVMETHOD(gpio\_pin\_getname,     \mbox{\hyperlink{dwgpio_8c_af10e7b8c87a90748eb7a628bbff4eab1}{dwgpio\_pin\_getname}}),}
\DoxyCodeLine{        DEVMETHOD(\mbox{\hyperlink{gpiobus_8c_a8e7a10a0251ef6ad8d399f97f421a381}{gpio\_pin\_getcaps}},     \mbox{\hyperlink{dwgpio_8c_ad3e96c278450508e0a41fb6733786bbc}{dwgpio\_pin\_getcaps}}),}
\DoxyCodeLine{        DEVMETHOD(gpio\_pin\_getflags,    \mbox{\hyperlink{dwgpio_8c_a8a1c67665dfaaee09d7d00e722bcea42}{dwgpio\_pin\_getflags}}),}
\DoxyCodeLine{        DEVMETHOD(gpio\_pin\_get,         \mbox{\hyperlink{dwgpio_8c_a95c66acdd1bf564ec93d97962b449c1d}{dwgpio\_pin\_get}}),}
\DoxyCodeLine{        DEVMETHOD(gpio\_pin\_toggle,      \mbox{\hyperlink{dwgpio_8c_a5ad3f444129346a342a70e023c79ffca}{dwgpio\_pin\_toggle}}),}
\DoxyCodeLine{        DEVMETHOD(\mbox{\hyperlink{gpiobus_8c_acf33df01cece89c7a6ce8c41c378d376}{gpio\_pin\_setflags}},   \mbox{\hyperlink{dwgpio_8c_aa7ac9425881d243acd80df96973f4bcf}{dwgpio\_pin\_setflags}}),}
\DoxyCodeLine{        DEVMETHOD(gpio\_pin\_set,         \mbox{\hyperlink{dwgpio_8c_ac726c6b4f79e3732249a117358ff38c3}{dwgpio\_pin\_set}}),}
\DoxyCodeLine{        \{ 0, 0 \}}
\DoxyCodeLine{\}}

\end{DoxyCode}


Definition at line \mbox{\hyperlink{dwgpio_8c_source_l00399}{399}} of file \mbox{\hyperlink{dwgpio_8c_source}{dwgpio.\+c}}.

